prga.core.builder.primitive module¶
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class
prga.core.builder.primitive.
DesignViewPrimitiveBuilder
(context, module, counterpart=None)¶ Bases:
prga.core.builder.primitive._BasePrimitiveBuilder
Design-view primitive module builder.
Parameters: -
_counterpart
¶
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create_prog_port
(name, width, direction, *, is_clock=False, **kwargs)¶ Create a programming port.
Parameters: - name (
str
) – Name of the programming port - width (
int
) – Number of bits in this port - direction (
PortDirection
orstr
) – Direction of this port
Keyword Arguments: - is_clock (
bool
) – Mark this port as a programming clock - **kwargs – Custom attibutes assigned to the port
Returns: Return type: - name (
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classmethod
new
(name, *, not_cell=False, **kwargs)¶ Create a new custom primitive.
Parameters: name (
str
) – Name of the primitiveKeyword Arguments: - not_cell (
bool
) – If set, the design-view primitive is not a cell module - **kwargs – Additional attibutes assigned to the primitive
Returns: Return type: - not_cell (
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classmethod
new_from_abstract_view
(abstract, *, not_cell=False, **kwargs)¶ Create a new design view from the abstract view of a primitive.
Parameters: abstract (
Module
) – Abstract view of the primitiveKeyword Arguments: - not_cell (
bool
) – If set, the design-view primitive is not a cell module - **kwargs – Additional attibutes assigned to the primitive
Returns: Return type: - not_cell (
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class
prga.core.builder.primitive.
MultimodeBuilder
(context, module)¶ Bases:
prga.core.builder.primitive._BasePrimitiveBuilder
Multi-mode module builder.
Parameters: -
build_design_view_counterpart
(*, not_cell=False, **kwargs)¶ Build the design view of this primitive.
Keyword Arguments: - not_cell (
bool
) – If set, sub-modules can be added into this design view - **kwargs – Additional attibutes assigned to the primitive
Returns: Return type: - not_cell (
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build_mode
(name, **kwargs)¶ Create a new mode for this multi-mode primitive.
Parameters: name ( str
) – Name of the modeKeyword Arguments: **kwargs – Additional attibutes assigned to the mode Returns: Return type: _ModeBuilder
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class
prga.core.builder.primitive.
PrimitiveBuilder
(context, module)¶ Bases:
prga.core.builder.primitive._BasePrimitiveBuilder
Abstract view primitive module builder.
Parameters: -
build_design_view_counterpart
(*, not_cell=False, **kwargs)¶ Build the design view of this module.
Keyword Arguments: - not_cell (
bool
) – If set, the design-view primitive is not a cell module - **kwargs – Additional attributes assigned to the design view
Returns: Return type: - not_cell (
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classmethod
new
(name, *, vpr_model=None, **kwargs)¶ Create a new primitive in abstract view for building.
Parameters: name (
str
) – Name of the primitiveKeyword Arguments: - vpr_model (
str
) – Name of the VPR model. Default: “m_{name}” - **kwargs – Additional attributes assigned to the primitive
Returns: Return type: - vpr_model (
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class
prga.core.builder.primitive.
_BasePrimitiveBuilder
(context, module)¶ Bases:
prga.core.builder.base.BaseBuilder
Base class for abstract-/design- [multi-mode] primitive builder.
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create_clock
(name, **kwargs)¶ Create a clock in the primitive.
Parameters: name ( str
) – Name of the clockKeyword Arguments: **kwargs – Additional attributes assigned to the port Returns: Return type: Port
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create_input
(name, width, **kwargs)¶ Create an input in the primitive.
Parameters: - name (
str
) – Name of the port - width (
int
) – Width of the port
Keyword Arguments: **kwargs – Additional attributes assigned to the port
Returns: Return type: - name (
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create_output
(name, width, **kwargs)¶ Create an output in the primitive.
Parameters: - name (
str
) – Name of the port - width (
int
) – Width of the port
Keyword Arguments: **kwargs – Additional attributes assigned to the port
Returns: Return type: - name (
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create_timing_arc
(type_, source, sink, *, max_=None, min_=None)¶ Create a
type_
-typed timing arc fromsource
tosink
.Parameters: - types (
TimingArcType
orstr
) – Type of the timing arc - source (
Port
) – An input port or a clock in the current module - sink (
Port
) – A port in the current module
Keyword Arguments: min (max,) – Refer to
TimingArc
for more informationReturns: The created timing arc
Return type: - types (
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class
prga.core.builder.primitive.
_ModeBuilder
(context, module)¶ Bases:
prga.core.builder.base.BaseBuilder
Mode builder.
Parameters: -
connect
(sources, sinks, *, fully=False, vpr_pack_patterns=(), **kwargs)¶ Connect
sources
tosinks
.Parameters: - sources – Source nets, i.e., an input port, an output pin of an instance, a subset of the above, or a list of a combination of the above
- sinks – Sink nets, i.e., an output port, an input pin of an instance, a subset of the above, or a list of a combination of the above
Keyword Arguments: - fully (
bool
) – If set toTrue
, connections are made between every source and every sink - vpr_pack_patterns (
Sequence
[str
]) – Add pack_pattern tags to the connections - **kwargs – Additional attibutes assigned to all connections
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instantiate
(model, name, reps=None, **kwargs)¶ Instantiate
model
in the mode.Parameters: - model (
Module
) – Abstract view of the module to be instantiated - name (
str
) – Name of the instance. Ifreps
is specified, each instance is named"{name}_i{index}"
- reps (
int
) – If set to a positive int, the specified number of instances are created, added to the mode, and returned. This affects the num_pb attribute in the output VPR specs
Keyword Arguments: **kwargs – Additional attributes assigned to the instance(s)
Returns: Return type: - model (
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