prga.tools.wizard package¶
This is an executable module:
usage: python -m prga.tools.wizard [-h] [-o OUTPUT] CONFIG.YAML
PRGA CAD flow wizard.
Auto-generate Makefile, synthesis script, testbench, etc. This tool takes a configuration file in YAML or JSON format. The configuration file requires the following keys:
context (string): File name of the pickled PRGA context
app (map): Data needed to describe the application to be mapped onto the FPGA
name (string): Name of the top-level module
sources (list of strings): Verilog source files of the application
includes (list of strings): [optional] Include directories of the application
defines (map of strings to strings, numbers or null): [optional] Define macros for Verilog preprocessing
parameters (map of strings to strings or numbers): [optional] Parameterization of the top-level module
The configuration file takes these optional keys:
compiler (string): Verilog compiler. Supported values are: "vcs", "verilog"
constraints (map): Various constraints
io (string): File name of the [partial] IO constraint
tests (map of maps): Tests for the application, indexed by the name of the test
sources (list of strings): Verilog source files of the test
includes (list of strings): [optional] Include directories of the test
defines (map of strings to strings, numbers or null): [optional] Define macros for Verilog preprocessing
parameters (map of strings to strings or numbers): [optional] Parameterization of the top-level test
comp_flags (list of strings): Additional flags for compilation
run_flags (list of strings): Additional flags for simulation
- positional arguments:
- CONFIG.YAML Configuration file in YAML or JSON format
- optional arguments:
-h, --help show this help message and exit -o OUTPUT, --output OUTPUT Output directory. All files are generated into the current directory by default
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prga.tools.wizard.def_argparser(name)¶