Table Of Contents
Table Of Contents

Quickstart

Prerequisites

RTL Simulator

PRGA currently provides scripts to use Icarus Verilog (open-source) or Synopsys VCS (commercial) for RTL simulation. However, the FPGA CAD flow does not depend on any simulator, so you may use any simulator of your choice. Synopsys VCS or other commercial simulators are recommended, because Icarus Verilog couldn’t handle large designs.

Install with Automated Installation Script

PRGA provides a push-button installation Bash script, envscr/install, which installs the following tools locally, without the requirement of root access:

  • Python 3.8+: PRGA uses pyenv, pipenv and venv to manage the Python binaries, packages and virtual environments. This minimizes the impact and possible conflicts with system-default Python binaries/packages.
  • Yosys: Open-source synthesis tool. This tool is included in PRGA as a submodule, and is automatically installed with the envscr/install script.
  • VPR: Open-source FPGA place-and-route tool. This tool is included in PRGA as a submodule, and is automatically installed with the envscr/install script.

To run this automated installation script:

cd /path/to/prga
./envscr/install

If there’s any error when installing Yosys or VPR, please refer to their installation guides and address any missing packages, libraries, or compiler requirements. For example, VPR requires CMake 3.0+, and Yosys required tcl-dev.

Run a Quick Test

Once envscr/install finishes, you may source envscr/activate to activate the Python virtual environment. Run any command as if you are using a normal bash terminal. Use deactivate to exit the virtual environment.

cd /path/to/prga
. ./envscr/activate
python --version                                 # 3.8.2
python -c "import prga; print(prga.VERSION)"     # 0.3.3
deactivate

To run an FPGA-building example, run the following commands:

# re-activate the virtual environment if you are not in it
cd /path/to/prga
. ./envscr/activate

# run an FPGA-building example
cd examples/fpga/scanchain/k4_N2_8x8
make

To run an application-implementation example, run the following commands:

# re-activate the virtual environment if you are not in it
# make sure you build the corresponding FPGA first

cd examples/app/bcd2bin/scanchain_k4_N2_8x8      # choose one application and one FPGA
make                                             # make project
make -C design                                   # run RTL-to-bitstream flow
make -C tests/basic behav                        # run behavioral verification
make -C tests/basic postsyn                      # run post-synthesis verification
make -C tests/basic postimpl                     # run post-implementation verification

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Welcome to Princeton Reconfigurable Gate Array’s documentation!
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