prga.prog.frame.protocol module¶
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prga.prog.frame.protocol.FrameProtocol¶ Bases:
object-
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Programming¶ Bases:
objectBitstream composed of sequence of instructions. Each instruction is 4-byte long, big endian. The most significant byte is composed of a 4-bit op code, 3 odd parity bits, one for each of the 3 remaining bytes, and an additional odd parity bit for the 7 bits mentioned above.
31 28 27 26 25 24 23 16 15 8 7 0 +--------+--------+--------+--------+--------+--------+--------+--------+ | | parity | parity | parity | parity | byte 2 | byte 1 | byte 0 | | opcode | for | for | for | for +--------+--------+--------+ | | byte 2 | byte 1 | byte 0 | 31:25 | argument | +--------+--------+--------+--------+--------+--------+--------+--------+
Instructions:
SOB: Start of bitstream. Argument is a magic number: 0xC4816DEOB: End of bitstream. Argument is a magic number: 0xDABA47JR: Jump relative to the current address.JAL: Jump to an absolute address, only modifying the Lower 24 bits. NOT “JUMP-AND-LINK” XDJAH: Jump to an absolute address, only modifying the Higher 24 bitsJAE: Jump to an absolute address, only modifying the Extended 24 bits, 71:48. Reserved for Extremely large FPGAsDATA: Start of a data segment. The argument is the number of “words” following the instruction, MINUS 1. i.e.0means 1 word,15means 16 words. The actual payload is aligned to 32-bit boundaryREAD: Read back a set amount of words. The argument is the number of “words” to read, MINUS 1CKSWRL: Write the Lower 24 bits of the checksumCKSWRH: Write the Higher 24 bits of the checksumCKSWRE: Write the Extended 24 bits, 71:48 of the checksumCKSRDL: Read the Lower 24 bits of the checksumCKSRDH: Read the Higher 24 bits of the checksumCKSRDE: Read the Extended 24 bits , 71:48 of the checksum
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MAGIC¶ Bases:
prga.util.EnumAn enumeration.
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EOB= 14334535¶
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NOP= 0¶
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SOB= 12878189¶
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