prga.renderer.lib module¶

class prga.renderer.lib.BuiltinCellLibrary¶

Bases: object

A host class for built-in cells.

classmethod _annotate_m_adder(context)¶

classmethod _create_memory_design(context, abstract)¶: Create design-view for memories.

classmethod _create_multimode_memory_design(context, abstract)¶: Create design-view for a multi-mode memory.

classmethod _create_multiplier_design(context, abstract)¶: Create design-view for multipliers.

classmethod _install_dffe(context)¶

classmethod _install_fle6(context)¶

classmethod _install_flipflop(context)¶

classmethod _install_grady18(context)¶

classmethod _install_grady18v0(context)¶

classmethod _install_io(context)¶

classmethod _install_luts(context)¶

classmethod _install_m_adder(context)¶

classmethod _install_m_dffe(context)¶

classmethod _install_m_fle6(context)¶

classmethod _install_m_flipflop(context)¶

classmethod _install_m_grady18(context)¶

classmethod _install_m_grady18v0(context)¶

classmethod _install_m_io(context)¶

classmethod _install_m_luts(context)¶

classmethod create_memory(context, addr_width, data_width, *, name=None, vpr_model=None, memory_type='1r1w', **kwargs)¶

Create a single-mode RAM.

Keyword Arguments:
Parameters:	context (`Context`) – addr_width (`int`) – Width of the address port(s) data_width (`int`) – Width of the data port(s)
	name (`str`) – Name of the memory module. Default: “ram_{memory_type}_a{addr_width}d{data_width}” vpr_model (`str`) – Name of the VPR model. Default: “m_ram_{memory_type}” memory_type (`str`) – `"1r1w"`, `"1r1w_init"`, `"1rw"` or `"2rw"`. Default is `"1r1w"`. `"1r1w_init"` memories are initializable and may be used as ROMs, but they are not supported by all programming circuitry types **kwargs – Additional attributes assigned to the primitive
Returns:
Return type:	`Module`

classmethod create_multimode_memory(context, core_addr_width, data_width, *, addr_width=None, name=None)¶

Create a multi-mode RAM.

Keyword Arguments:
Parameters:	context (`Context`) – core_addr_width (`int`) – The address width of the single-mode, 1R1W RAM core behind the multi-mode logic data_width (`int`) – The data width of the single-mode, 1R1W RAM core behind the multi-mode logic
	name (`str`) – Name of the multi-mode primitive. `"fracram_a{addr_width}d{data_width}"` by default. addr_width (`int`) – The maximum address width. See notes for more information
Returns:	Abstract view of the multi-modal primitive
Return type:	`Module`

Notes

This method builds a multi-mode, fracturable 1R1W RAM. For example, create_multimode_memory(ctx, 9, 64) creates a multimode primitive with the following modes: 512x64b, 1K32b, 2K16b, 4K8b, 8K4b, 16K2b, and 32K1b.

If 1b is not the desired smallest data width, change addr_width to a number between core_addr_width and core_addr_width + floor(log2(data_width)).

When data_width is not a power of 2, the actual data width of each mode is determined by the actual address width. For example, create_multimode_memory(ctx, 9, 72) creates the following modes: 512x72b, 1K36b, 2K18b, 4K9b, 8K4b, 16K2b, 32K1b. Note that instead of a 9K4b, we got a 8K4b.

classmethod create_multiplier(context, width_a, width_b=None, *, name=None)¶

Create a basic combinational multiplier.

Keyword Arguments:
Parameters:	context (`Context`) – width_a (`int`) – Width of the multiplier/multiplicand width_b (`int`) – Width of the other multiplier/multiplicand. Equal to `width_a` if not set.
	name (`str`) – Name of the primitive. `"mul_a{width_a}b{width_b}"` by default.
Returns:	User view of the multiplier
Return type:	`Module`

classmethod install_abstract(context)¶

Install the built-in abstract-view modules into context.

Parameters:	context (`Context`) –

classmethod install_design(context)¶

Install the built-in design-view modules into context.

Parameters:	context (`Context`) –

classmethod install_stdlib(context)¶

Install standard PRGA designs/headers into context.

Parameters:	context (`Context`) –