prga.integration.integration module¶

class prga.integration.integration.Integration¶

Bases: object

Wrapper class for utility functions that helps integrating the fabric into a hybrid system.

classmethod _create_app_intf(context, interfaces)¶

Create an AppIntf object with the specified fabric interfaces.

Parameters:	context (`Context`) – interfaces (`Container` [`FabricIntf` ]) – `FabricIntf.syscon` is always added
Returns:
Return type:	`AppIntf`

classmethod _create_intf_ports_memory_piton(module, slave=False, prefix='', *, ecc=<FabricIntfECCType.none: 0>)¶

Create cache-coherent memory interface compatible with OpenPiton. By default this creates the master interface that sends requests and recieve responses.

Keyword Arguments:
Parameters:	module (`Module`) – slave (`bool`) – If set, slave interface is added to `module` prefix (`str`) – Prefix of the port names
	ecc (`FabricIntfECCType` or `str`) – ECC algorithm. If set to any value other than `FabricIntfECCType.none`, an ECC port is added on the response channel

classmethod _create_intf_ports_memory_piton_axi4r(module, slave=False, prefix='', *, ecc=<FabricIntfECCType.parity_even: 2>, unused=False, upper=False)¶

Create cache-coherent memory load interface in AXI4 protocol. By default this creates the master interface that sends AR channel requests and receive R channel responses.

Keyword Arguments:
Parameters:	module (`Module`) – slave (`bool`) – If set, slave interface is added to `module` prefix (`str`) – Prefix of the port names
	ecc (`FabricIntfECCType`) – ECC check type unused (`bool`) – If set, unused but required AXI4 ports are also added, including `arprot`, `arqos`, and `arregion`. upper (`bool`) – If set, AXI4 port names are upper case

classmethod _create_intf_ports_memory_piton_axi4w(module, slave=False, prefix='', *, ecc=<FabricIntfECCType.parity_even: 2>, unused=False, upper=False)¶

Create cache-coherent memory store interface in AXI4 protocol. By default this creates the master interface that sends AW/W channel requests and receive B channel responses.

Keyword Arguments:
Parameters:	module (`Module`) – slave (`bool`) – If set, slave interface is added to `module` prefix (`str`) – Prefix of the port names
	ecc (`FabricIntfECCType`) – ECC check type unused (`bool`) – if set, unused but required AXI4 ports are also added, including `awprot`, `awqos`, `awlock`, and `awregion`. upper (`bool`) – If set, AXI4 port names are upper case

classmethod _create_intf_ports_prog_piton(module, slave=False, prefix='')¶

Create register-based programming interface compatible with OpenPiton. By default this creates the master interface that outputs programming data.

Parameters:	module (`Module`) – slave (`bool`) – If set, create slave interface (accepts programming data) instead of master interface prefix (`str`) – Prefix of the port names

classmethod _create_intf_ports_reg(module, slave=False, prefix='', *, ecc=<FabricIntfECCType.none: 0>, addr_width=12, data_bytes=8, strb=False)¶

Create register-based interface. By default this creates the master interface that sends register access requests and receives responses.

Keyword Arguments:
Parameters:	module (`Module`) – slave (`bool`) – If set, slave interface is added to `module` prefix (`str`) – Prefix of the port names
	ecc (`FabricIntfECCType` or `str`) – ECC algorithm. If set to any value other than `FabricIntfECCType.none`, an ECC port is added on the response channel addr_width (`int`) – Number of bits in the address bus data_bytes (`int`) – Number of bytes in the data bus strb (`bool`) – If set, byte write strobes are used instead of a full-word write-enable signal

classmethod _create_intf_ports_syscon(module, slave=False, prefix='')¶

Create system control signals (clk and rst_n).

Parameters:	module (`Module`) – slave (`bool`) – If set, create slave interface (`clk` and `rst_n` as input) instead of master interface prefix (`str`) – Prefix of the port names

classmethod _register_cells(context)¶

Register integration-related modules in to the module database.

Parameters:	context (`Context`) –

classmethod _validate_fabric_intfs(intfs)¶

Validate fabric interface collection.

Parameters:	intfs (`Container` [`SystemIntf` ]) –

classmethod _validate_system_intfs(intfs)¶

Validate system interface collection.

Parameters:	intfs (`Container` [`SystemIntf` ]) –

classmethod build_system(context, system_intfs=(SystemIntf[syscon](id=None), SystemIntf[reg_piton](id='reg'), SystemIntf[memory_piton](id='ccm')), fabric_intfs=(FabricIntf[syscon](id='app'), FabricIntf[softreg](id='ureg', ecc=parity_even, addr_width=12, data_bytes_log2=3, strb=n), FabricIntf[memory_piton_axi4r](id=None, ecc=parity_even), FabricIntf[memory_piton_axi4w](id=None, ecc=parity_even)), *, name='prga_system', fabric_wrapper=None)¶

Create the system top wrapping the reconfigurable fabric.

Keyword Arguments:
Parameters:	context (`Context`) – system_intfs (`Container` [`SystemIntf` ]) – System interfaces fabric_intfs (`Container` [`FabricIntf` ]) – Fabric (application-available) interfaces
	name (`str`) – Name of the system top module fabric_wrapper (`str` or `bool`) – If set to a `str`, or set to `True` (in which case it is converted to `{name}_core`), an extra layer of wrapper is created around the fabric and instantiated in the top-level module

classmethod build_system_piton_vanilla(context, fabric_axi4=True, *, name='prga_system', fabric_wrapper=None)¶

Create the system top wrapping the reconfigurable fabric. This method is implemented specifically for OpenPiton vanilla integration.

Keyword Arguments:
Parameters:	context (`Context`) – fabric_axi4 (`bool`) – If set, use AXI4-based fabric interface
	name (`str`) – Name of the system top module fabric_wrapper (`str` or `bool`) – If set to a `str`, or set to `True` (in which case it is converted to `{name}_core`), an extra layer of wrapper is created around the fabric and instantiated in the top-level module